A multi-level cell (MLC) is a memory element capable of storing more than a single bit of information, compared to a single-level cell (SLC) which can store only one bit per memory element. Triple-level cells (TLC) and quad-level cells (QLC) are versions of MLC memory, which can store 3 and 4 bits per cell, respectively. (Note that due to convention, the name “multi-level cell” is sometimes used specifically to refer to the “two-level cell”). Overall, memories are commonly referred to as SLC (1 bit per cell—fastest, highest cost); MLC (2 bits per cell); TLC (3 bits per cell); and QLC (4 bits per cell—slowest, least cost).
One example of a MLC memory is QLC NAND flash memory. High density QLC NAND flash memory provides excellent read throughput, but write throughput lags behind significantly and provides limited endurance, which is measured in Drive Writes Per Day (DWPD). Since QLC NAND flash memory requires the writing of a whole block of memory at a time, if there is only a small change in stored data (such as any amount smaller than the block size) unnecessary write cycles are typically performed during write operations. NAND Pages cannot be overwritten and the only way to reclaim individual pages is to move used pages in a NAND block to new block and erase whole NAND block at once. This is triggered automatically by the garbage collection process in the flash controller. Furthermore, every cell in a NAND die has a limited number of write cycles before the cell becomes unreliable and unusable. In some NAND flash memories, a measurement of the endurance is only 0.3 DWPD. This may be unacceptable in some scenarios, such as in servers.